Plating technology for embedding vias in wafers (TSV/TGV)
Reduce CMP grinding burden! Plating is possible for through vias on ceramic substrates and resin substrates.
The "embedded plating technology for vias in wafers" is used for the purpose of improving frequency characteristics, achieving high-density miniaturization, and reducing power consumption, and is also being considered for applications in 5G communications. Our company is capable of metal embedding through plating for both blind vias and through vias. Additionally, we accommodate various via shapes, including straight shapes, constricted shapes, tapered shapes, and wall surface irregularities. 【Features】 ■ Embedding plating without voids is possible ■ Reduces the burden of CMP polishing ■ Compatible with various via shapes ■ Non-destructive confirmation of the embedding state is possible ■ Conformal plating technology *For more details, please refer to the PDF document or feel free to contact us.
- Company：清川メッキ工業
- Price：Other
